s1c17555/565/955/965 16-bit single chip microcontroller z built-in fsa (flexible signal processing accelerator) function; it realize high processing with low power z 12-bit a/d converter z several kinds of serial interface z 48-pin wafer-chip-scale package (wcsp) z built-in the flash memory that it can write with a single power supply descriptions s1c17555/565/955/965 can operate at high speed with low power and it has large address area. these products have good points such as space-sa ving package (wcsp), 12-bit a/d converter and signal processing accelerator(fsa) every model and selectable depending on a use. in fsa, signal processing ranging from image processing to audio handling is possible. S1C17955/965 is most suitable for the application such as mobile devices. fsa realize high processing with a low clock, and realize a low consumption design by using this function. ? features CN s1c17555 s1c17565 S1C17955 s1c17965 cpu cpu core seiko epson original 16-bit risc cpu core s1c17 multiplier/divider (copro) ? 16-bit 16-bit multiplier ? 16-bit 16-bit + 32-bit multiply and accumulation unit ? 16-bit 16-bit divider fsa *1 multiply and accumulation unit - 32-bit 32-bit multiplier + 72-bit adder data access - 2 inputs and 1 output address space 12k bytes embedded flash memory capacity 128k bytes (for both instructions and data) erase/program count 40 times (min.) (appli ed only when fls v1.0 or later is used.) other ? read/program protection function ? an embedded power supply booste r for erasing/programming ? allows on-board programming using a debugging tool such as icdmini. embedded ram ram1 capacity 4k bytes ram2 (fsa ram) capacity 12k bytes clock generator (clg) system clock source 2 sources (iosc/osc1) 3 sources (iosc/osc1/osc3) 2 sources (iosc/osc1) 3 sources (iosc/osc1/osc3) iosc oscillator circuit 2/4/8/12 mhz (typ.) internal oscillator circuit osc3 oscillator circuit C 24 mhz (max.) crystal or ceramic oscillator circuit supports an external clock input. C 24 mhz (max.) crystal or ceramic oscillator circuit supports an external clock input. osc1 oscillator circuit 32.768 khz (typ.) crystal o scillator circuit. supports an external clock input. other ? core clock frequency control ? peripheral module clock supply control i/o ports (p) max. 20 bits max. 24 bits max. 20 bits max. 24 bits number of general-purpose i/o ports pins are shared with the peripheral i/o. serial interfaces 8-bit spi (spi) 2 channels 16-bit spi (spi16) 1 channel i 2 c master (i2cm) 1 channel i 2 c slave (i2cs) 1 channel uart uart 1 channel (irda1.0 supported) 2 channels (irda1.0 supported) 1 channel (irda1.0 supported) 2 channels (irda1.0 supported) ir remote controller (remc) ? 1 channel ? 1 channel timers 16-bit timer (t16) 3 channels fine mode 16-bit timer (t16f) 2 channels 16-bit pwm timer (t16a2) 4 channels clock timer (ct) 1 channel stopwatch timer (swt) 1 channel watchdog timer (wdt) 1 channel free datasheet http:///
s1c17555/565/955/965 12-bit a/d converter (adc12sa) conversion method C successive approximation type C successive approximation type analog input channel C 6 channels (three channels can only be used for multichannel conversion.) C 6 channels (three channels can only be used for multichannel conversion.) resolution C 12 bits C 12 bits interrupts reset interrupt #reset pin nmi watchdog timer programmable interrupts 21 systems (8 levels) 22 systems (8 levels) 21 systems (8 levels) 22 systems (8 levels) power supply voltage core voltage (lv dd ) 1.65 v to 1.95 v 1.65 v to 1.95 v (not required when the regulator is used) 1.65 v to 1.95 v 1.65 v to 1.95 v (not required when the regulator is used) i/o voltage (hv dd ) 1.65 v to 3.6 v 2.0 v to 3.6 v (when the regulator is used) 1.65 v to 3.6 v (when the regulator is not used) 1.65 v to 3.6 v 2.0 v to 3.6 v (when the regulator is used) 1.65 v to 3.6 v (when the regulator is not used) analog voltage (av dd ) C 2.7 v to 3.6 v (not required when the regulator is used) C 2.7 v to 3.6 v (not required when the regulator is used) flash programming voltage (v pp ) 7.5 v (not required when the regulator/booster is used.) regulators lv dd regulator C input: 2.0 v to 3.6 v output: 1.8 v C input: 2.0 v to 3.6 v output: 1.8 v av dd regulator C input: 3.1 v to 3.6 v, output: 2.8 v C input: 3.1 v to 3.6 v, output: 2.8 v v pp regulator/booster input: 2.4 v to 3.6 v output: 7.5 v operating temperature operating temperature range -40c to 85c (10 to 40c when programing/erasing the flash) current consumption (typ. value, lvdd = hvdd = 1.8 v, regulator not used) sleep state 1.0 a (iosc = off, osc1 = off, osc3 = off) halt state 2.9 a (iosc = off, osc1 = 32 khz, osc3 = off) run state 3500 a (iosc = 12 mhz, osc1 = off, osc3 = off) fsa operating current - +270 a/mhz shipping form 1 wcsp-48 3.863 3.863 0.8 mm, ball pitch: 0.5 mm tqfp13-64pin 10 10 1.0 mm, lead pitch: 0.5 mm wcsp-48 3.863 3.863 0.8 mm, ball pitch: 0.5 mm tqfp13-64pin 10 10 1.0 mm, lead pitch: 0.5 mm 2 die form 3.863 3.863 mm, pad pitch: 140 m die form 3.863 3.863 mm, pad pitch: 140 m *1 for more information on the fsa, please contact seiko epson. 2 seiko epson corporation free datasheet http:///
s1c17555/565/955/965 ? block diagram cpu core s1c17 internal ram1 (4k bytes) flash memory (128k bytes) reset circuit interrupt controller 16-bit timer (3 ch.) fine mode 16-bit timer (2 ch.) uart (2 ch.) 8-bit spi (2 ch.) 16-bit spi (1 ch.) i 2 c master (1 ch.) i 2 c slave (1 ch.) internal ram2 (12k bytes) regulator 12-bit a/d converter misc register clock generator (with oscillators) clock timer stopwatch timer watchdog timer 16-bit pwm timer (4 ch.) ir remote controller 32 bits i/o port/ port mux dclk, dst2, dsio vinl, vina, vinp, regen c1p, c1n, c1h, c2p, c2n av dd , av ss ainx itrs osc1-2, osc3-4 fouta, foutb excl0-2, msclk capa0-3, touta0-3 remi, remo p00-07, p10-17, p20-27 lv dd , hv dd v pp #reset sin0-1, sout0-1, sclk0-1 sdi0-1, sdo0-1, spiclk0-1, #spiss0-1 sdi2, sdo2, spiclk2, spiss2 sdam, sclm sdas, scls #bfr 16 bits 8/16 bits 8/16 bits 32 bits interrupt system cpu core s1c17 internal ram1 (4k bytes) flash memory (128k bytes) reset circuit interrupt controller 16-bit timer (3 ch.) fine mode 16-bit timer (2 ch.) uart (2 ch.) 8-bit spi (2 ch.) 16-bit spi (1 ch.) i 2 c master (1 ch.) i 2 c slave (1 ch.) internal ram2 (12k bytes) regulator 12-bit a/d converter misc register clock generator (with oscillators) clock timer stopwatch timer watchdog timer 16-bit pwm timer (4 ch.) ir remote controller 32 bits i/o port/ port mux dclk, dst2, dsio vinl, vina, vinp, regen c1p, c1n, c1h, c2p, c2n av dd , av ss ainx itrs osc1-2, osc3-4 fouta, foutb excl0-2, msclk capa0-3, touta0-3 remi, remo p00-07, p10-17, p20-27 lv dd , hv dd v pp #reset sin0-1, sout0-1, sclk0-1 sdi0-1, sdo0-1, spiclk0-1, #spiss0-1 sdi2, sdo2, spiclk2, spiss2 sdam, sclm sdas, scls #bfr 16 bits 8/16 bits 8/16 bits 32 bits interrupt system s1c17555 cpu core s1c17 internal ram1 (4k bytes) flash memory (128k bytes) reset circuit interrupt controller 16-bit timer (3 ch.) fine mode 16-bit timer (2 ch.) uart (1 ch.) 8-bit spi (2 ch.) 16-bit spi (1ch.) i 2 c master (1 ch.) i 2 c slave (1 ch.) internal ram2 (12k bytes) misc register clock generator (with oscillators) clock timer stopwatch timer watchdog timer 16-bit pwm timer (4 ch.) 16 bits 32 bits 8/16 bits 32 bits 8/16 bits interrupt system i/o port/ port mux dclk, dst2, dsio osc1-2 fouta, foutb excl0-2, msclk capa0-2, touta0-2 p00-07, p10-17, p20-23 sdas, scls #bfr sdam, sclm sdi2, sdo2, spiclk2, spiss2 sdi0-1, sdo0-1, spiclk0-1, #spiss0-1 sin0, sout0, sclk0 #reset v pp lv dd , hv dd cpu core s1c17 internal ram1 (4k bytes) flash memory (128k bytes) reset circuit interrupt controller 16-bit timer (3 ch.) fine mode 16-bit timer (2 ch.) uart (1 ch.) 8-bit spi (2 ch.) 16-bit spi (1ch.) i 2 c master (1 ch.) i 2 c slave (1 ch.) internal ram2 (12k bytes) misc register clock generator (with oscillators) clock timer stopwatch timer watchdog timer 16-bit pwm timer (4 ch.) 16 bits 32 bits 8/16 bits 32 bits 8/16 bits interrupt system i/o port/ port mux dclk, dst2, dsio osc1-2 fouta, foutb excl0-2, msclk capa0-2, touta0-2 p00-07, p10-17, p20-23 sdas, scls #bfr sdam, sclm sdi2, sdo2, spiclk2, spiss2 sdi0-1, sdo0-1, spiclk0-1, #spiss0-1 sin0, sout0, sclk0 #reset v pp lv dd , hv dd s1c17565 seiko epson corporation 3 free datasheet http:///
s1c17555/565/955/965 4 seiko epson corporation cpu core s1c17 internal ram1 (4k bytes) flash memory (128k bytes) reset circuit interrupt controller 16-bit timer (3 ch.) fine mode 16-bit timer (2 ch.) uart (1 ch.) 8-bit spi (2 ch.) 16-bit spi (1 ch.) i2c master (1 ch.) i2c slave (1 ch.) fsa internal ram2 (fsa ram) (12k bytes) misc register clock generator (with oscillators) clock timer stopwatch timer w atchdog timer 16-bit pwm timer (4 ch.) i/o port/ port mux dclk, dst2, dsio osc1-2 fouta, foutb excl0-2, msclk capa0-2, touta0-2 p00-07, p10-17, p20-23 lv dd , hv dd v pp #reset sin0, sout0, sclk0 sdi0-1, sdo0-1, spiclk0-1, #spiss0-1 sdi2, sdo2, spiclk2, spiss2 sdam, sclm sdas, scls #bfr 32 bits 16 bits 32 bits 32 bits 8/16 bits 8/16 bits interrupt system cpu core s1c17 internal ram1 (4k bytes) flash memory (128k bytes) reset circuit interrupt controller 16-bit timer (3 ch.) fine mode 16-bit timer (2 ch.) uart (1 ch.) 8-bit spi (2 ch.) 16-bit spi (1 ch.) i2c master (1 ch.) i2c slave (1 ch.) fsa internal ram2 (fsa ram) (12k bytes) misc register clock generator (with oscillators) clock timer stopwatch timer w atchdog timer 16-bit pwm timer (4 ch.) i/o port/ port mux dclk, dst2, dsio osc1-2 fouta, foutb excl0-2, msclk capa0-2, touta0-2 p00-07, p10-17, p20-23 lv dd , hv dd v pp #reset sin0, sout0, sclk0 sdi0-1, sdo0-1, spiclk0-1, #spiss0-1 sdi2, sdo2, spiclk2, spiss2 sdam, sclm sdas, scls #bfr 32 bits 16 bits 32 bits 32 bits 8/16 bits 8/16 bits interrupt system S1C17955 s1c17965 cpu core s1c17 internal ram (4k bytes) flash memory (128k bytes) reset circuit interrupt controller 16-bit timer (3 ch.) fine mode 16-bit timer (2 ch.) uart (2 ch.) 8-bit spi (2 ch.) 16-bit spi (1 ch.) i 2 c master (1 ch.) i 2 c slave (1 ch.) fsa internal ram2 (fsa ram) (12k bytes) regulator 12-bit a/d converter misc register clock generator (with oscillators) clock timer stopwatch timer watchdog timer 16-bit pwm timer (4 ch.) ir remote controller i/o port/ port mux dclk, dst2, dsio vinl, vina, vinp, regen c1p, c1n, c1h, c2p, c2n av dd , av ss ainx itrs osc1-2, osc3-4 fouta, foutb excl0-2, msclk ca`a0-3, touta0-3 remi, remo p00-07, p10-17, p20-27 lv dd , hv dd v pp #reset sin0-1, sout0-1, sclk0-1 sdi0-1, sdo0-1, spiclk0-1, #spiss0-1 sdi2, sdo2, spiclk2, spiss2 sdam, sclm sdas, scls #bfr 32 bits 16 bits 32 bits 32 bits 8/16 bits 8/16 bits interrupt system cpu core s1c17 internal ram (4k bytes) flash memory (128k bytes) reset circuit interrupt controller 16-bit timer (3 ch.) fine mode 16-bit timer (2 ch.) uart (2 ch.) 8-bit spi (2 ch.) 16-bit spi (1 ch.) i 2 c master (1 ch.) i 2 c slave (1 ch.) fsa internal ram2 (fsa ram) (12k bytes) regulator 12-bit a/d converter misc register clock generator (with oscillators) clock timer stopwatch timer watchdog timer 16-bit pwm timer (4 ch.) ir remote controller i/o port/ port mux dclk, dst2, dsio vinl, vina, vinp, regen c1p, c1n, c1h, c2p, c2n av dd , av ss ainx itrs osc1-2, osc3-4 fouta, foutb excl0-2, msclk ca`a0-3, touta0-3 remi, remo p00-07, p10-17, p20-27 lv dd , hv dd v pp #reset sin0-1, sout0-1, sclk0-1 sdi0-1, sdo0-1, spiclk0-1, #spiss0-1 sdi2, sdo2, spiclk2, spiss2 sdam, sclm sdas, scls #bfr 32 bits 16 bits 32 bits 32 bits 8/16 bits 8/16 bits interrupt system free datasheet http:///
s1c17555/565/955/965 notice: no part of this material may be reproduced or duplicated in any fo rm or by any means without the written permission of seiko ep son. seiko epson reserves the right to make changes to this material without notice. seiko epson does not assume any liability of any kin d arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there i s no representation that this material is applicable to pr oducts requiring high level reliability, such as, medical products. moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accord ance with this material will be free from any patent or copyright infringement of a third party. when exporting the products or technology des cribed in this material, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. you are requested not to use, to resell, to export and/or to otherwise dispose of the products (and any technical information furnished, if any) for the development and/or manufacture of weapon of mass destruction or for other military purposes. all brands or product names mentioned herein are trademarks and/ or registered trademarks of t heir respective companies. ? seiko epson corporation 2012, all rights reserved epson semiconductor website microdevices operations division http://www.epson.jp/device/semicon_e/ ic sales & marketing department 421-8 hino, hino-shi, tokyo 191-8501, japan phone: +81-42-587-5814 fax: +81-42-587-5117 document code: 412473600 first issue dec., 2012 in j apan 5 free datasheet http:///
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